Leadframe with encapsulant guide and method for the fabrication thereof

ABSTRACT

A method for fabricating a leadframe with encapsulant guide is provided, including forming a die attach paddle. Leads are formed around at least portions of the die attach paddle, and encapsulant guides are formed angled on a plurality of the leads to push the leads outwardly when an encapsulant flows therepast.

TECHNICAL FIELD

The present invention relates generally to integrated circuits, and moreparticularly to leadframes for integrated circuits and methods forfabrication of such leadframes.

BACKGROUND ART

Reducing the size of electronic devices while increasing performance andspeed is a continuing objective in the electronics industry. Electronicsystem manufacturers continue to demand components with higherperformance and reliability along with reduced physical sizes andmanufacturing costs. To accomplish this, increased miniaturization ofintegrated circuit (“IC”) packages is becoming increasingly essential.In response, modern requirements for semiconductor packaging areincreasingly oriented toward smaller and thinner packages having everhigher numbers of input/output (“I/O”) terminals.

IC packages for complex electronic systems typically incorporate one ormore interconnected IC chips or dies, which are usually made from asemiconductor material such as silicon (“Si”) or gallium arsenide(“GaAs”). A variety of semiconductor devices may be formed in variouslayers on IC chips using photolithographic techniques. Aftermanufacture, the IC chips are typically incorporated into packages thatare then mounted on printed circuit boards.

IC chip packages typically have numerous external pins that aremechanically attached to conductor patterns on the printed circuitboards by soldering or other known techniques. Typically, the packagesin which these IC chips are mounted include a substrate or otherchip-mounting device. One example of such a substrate is a leadframe.High-performance leadframes may encompass multi-layer structuresincluding power, ground, and signal layers on separate planes.

IC chips may be attached to a leadframe by use of an adhesive, or byother commonly employed techniques such as soldering. A number of power,ground, and/or signal leads is then attached to power, ground, and/orsignal sites on the IC chip.

Once an IC chip is attached mechanically and electrically to theleadframe, the leadframe may be enclosed or encapsulated in a protectiveenclosure such as plastic, or a multi-part housing made of plastic,ceramic, or metal. The enclosure helps to protect the leadframe and theattached IC chip from physical, electrical, moisture, and/or chemicaldamage.

The leadframe and attached chip may then be mounted, for example, on acircuit board or circuit card, typically with other leadframes ordevices, for incorporation into any of a wide variety of end products.

Typical known leadframes that include a number of layers on differentplanes are complex and expensive to produce. Multiple planes havenevertheless been incorporated into the design of many leadframes inorder to accommodate the high density of leads needed for the highlycomplex IC chips typically used today.

Another solution for providing a high density of leads is a multiple-rowleadframe in which independent inner and outer rows of leads areprovided in a common plane. One such configuration, for example,provides a dual-row pattern in which an inner row of leads is surroundedby an outer row, either in staggered or in-line configurations.

“Leadless” packages are becoming increasingly important as component andcircuit designs become ever smaller and smaller. In such leadlesspackages, the internal leads of the leadframe terminate as contacts onthe exterior surface of the package rather than as external wires orleads extending outwardly from the package surface. In this manner, someof the contacts, for example those coming from the internal inner rowleads, can be located on the package surface inwardly and away from thepackage edge. This positions the inner row contacts away from othercontacts that are on the package edge (such as, for example, contactsfrom the outer row leads). More contacts can thus be accommodatedwithout requiring a larger and longer package edge, since not all thecontacts are crowded together just at and along the package edge.

One such leadles package is a equal flat no lead (“QFN”) package. QFNpackages with higher numbers of input and output (“I/O”) connections inthe same (or smaller) body sizes are increasingly important forsuccessful and competitive end-product designs. One key factor that ishelping to achieve the higher number of I/Os in such compact end-productdesigns is a dual-row internal lead arrangement incorporated intoleadless QFN packages. These designs have inner row leads and outer rowleads (either staggered or in-line), usually in the same plane.

Unfortunately, as the leadframe elements become smaller and smaller insuch designs, they also become thinner and less robust, which makes themincreasingly susceptible to displacement, such as bending or tilting,while they are being encapsulated. The supports for the inner leads, inparticular, are weaker than those for the outer leads. The inner leadsare therefore even more likely to be displaced in this manner by theencapsulant as the encapsulant flows over and through the leadframeduring the molding process. This displacement moves the leads from theirproper positions and allows the encapsulant to seep under the leads,causing mold flash underneath the pad terminals. This in turn causes theleads to be partially or completely covered with the encapsulant at thepackage surface, which results in a defective package.

Thus, a need remains for leadframe designs, configurations, andmanufacturing methods that will maintain the leads in their properpositions during the flow of the encapsulant in the package moldingprocess. In view of the ever-decreasing sizes of leadframes, the ever-increasing numbers of leads on such leadframes, and the persistent needto reduce costs and increase efficiencies, it is increasingly criticalthat answers be found to these problems.

Solutions to these problems have been long sought but prior developmentshave not taught or suggested any solutions and, thus, solutions to theseproblems have long eluded those skilled in the art.

DISCLOSURE OF THE INVENTION

The present invention provides a method for fabricating a leadframe withencapsulant guide. A die attach paddle is formed. Leads are formedaround at least portions of the die attach paddle, and encapsulantguides are formed angled on a plurality of the leads to push the leadsoutwardly when an encapsulant flows therepast.

Certain embodiments of the invention have other advantages in additionto or in place of those mentioned above. The advantages will becomeapparent to those skilled in the art from a reading of the followingdetailed description when taken with reference to the accompanyingdrawings.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a top view, according to the present invention, of anembodiment of a leadframe having inner leads, outer leads, and a dieattach paddle;

FIG. 2 is a cross-sectional view of the structure of FIG. 1, taken online 2-2 in FIG. 1;

FIG. 3 is a cross-sectional view of the structure of FIG. 1, taken online 3-3 in FIG. 1;

FIG. 4 is a cross-sectional view of the inner lead shown in FIG. 3,taken on line 4-4 in FIG. 3;

FIG. 5 is a cross-sectional view of a properly formed semiconductorpackage fabricated using the structure of FIG. 1;

FIG. 6 is a fragmentary cross-sectional view of a semiconductor packagein an intermediate stage of a molding process;

FIG. 7 is a view of the structure of FIG. 6 at a later stage offabrication;

FIG. 8 is a view similar to that of FIGS. 6 and 7 after completion ofthe molding process;

FIG. 9 is a view of a completed semiconductor package resulting from theprocess shown in FIGS. 6-8; and

FIG. 10 is a flow chart of a method for fabricating a leadframe withencapsulant guide in accordance with an embodiment of the presentinvention.

BEST MODE FOR CARRYING OUT THE INVENTION

In the following description, numerous specific details are given toprovide a thorough understanding of the invention. However, it will beapparent that the invention may be practiced without these specificdetails. In order to avoid obscuring the present invention, somewell-known configurations and process steps are not disclosed in detail.Likewise, the drawings showing embodiments of the invention aresemi-diagrammatic and not to scale and, particularly, some of thedimensions are for the clarity of presentation and are shown exaggeratedin the drawing FIGs. Additionally, where multiple embodiments aredisclosed and described having some features in common, for clarity andease of illustration, description, and comprehension thereof, similarand like features one to another will ordinarily be described with likereference numerals.

The term “horizontal” as used herein is defined as a plane parallel tothe conventional plane or surface of the leadframe, regardless of itsorientation. The term “vertical” refers to a direction perpendicular tothe horizontal as just defined. Terms, such as “on”, “above”, “below”,“bottom”, “top”, “side” (as in “sidewall”), “higher”, “lower”, “upper”,“over”, and “under”, are defined with respect to the horizontal plane.

The term “processing” as used herein includes deposition of material orphotoresist, patterning, exposure, development, etching, cleaning,and/or removal of the material or photoresist as required in forming adescribed structure.

As leadless semiconductor packages become smaller and smaller withlarger and larger contact counts, the internal leadframe leadsnecessarily have become thinner and weaker, posing increasingdifficulties for economical and efficient fabrication of such packages.

The quad flat no lead (“QFN”) package is one such leadless package. QFNpackages are increasingly popular because the can readily provide highernumbers of input and output (“I/O”) connections in the same (or smaller)body sizes. As a result, QFN packages are increasingly important forsuccessful, competitive end-product designs.

One key factor contributing to higher numbers of QFN package I/Os is adual-row internal lead arrangement having inner row leads and outer rowleads (either staggered or in-line), usually in the same plane.Unfortunately, in modern compact packages such as QFN packages, theincreasingly smaller and less robust leads are more and more susceptibleto displacement, such as bending or tilting, as they are beingencapsulated. The supports for the inner leads, in particular, areweaker than those for the outer leads. The inner leads are thereforeeven more likely to be displaced in this manner by the encapsulant asthe encapsulant flows over and through the leadframe during the moldingprocess. This displacement moves the leads from their proper positionsand allows the encapsulant to seep under the leads, causing mold flashunderneath the pad terminals. This in turn causes the leads to bepartially or completely covered with the encapsulant at the packagesurface, resulting in a defective package.

Referring now to FIG. 1, therein is shown a top view of an embodiment ofa leadframe 100 according to the present invention. The leadframe 100has inner leads 102 and outer leads 104 arranged in respective inner andouter rows that surround a die attach paddle 106. The inner leads 102terminate in lead tips 108, and the outer leads 104 terminate in leadtips 110. The upper faces of the lead tips 108 of the inner leads 102are shaped, as further described below, to form encapsulant guides 112that, in one embodiment, are integral with the inner leads 102. Tie bars114 connect the die attach paddle 106 to the outer portions of theleadframe 100, such as, for example, by connecting respectively toseveral of the inner leads 102, or to the outer leads 104.

Referring now to FIG. 2, therein is shown a cross-sectional view of theleadframe 100 of FIG. 1, taken on line 2-2 therein.

Referring now to FIG. 3, therein is shown a cross-sectional view of theleadframe 100 of FIG. 1, taken on line 3-3 therein.

Referring now to FIG. 4, therein is shown a cross-sectional view of theinner lead 102 taken on line 4-4 in FIG. 3. In this embodiment, theportion of the inner lead 102 in this region is broader on the top 402thereof than on the bottom 404 thereof.

The inner and outer lead tips 108 and 110 and the encapsulant guides 112may be formed and shaped by etching processes, applied either to one orto both sides thereof according to the surface shapes that are to beformed. Forming the top 402 of the inner lead 102 to be broader than thebottom 404, for example by etching from the bottom side, assists inbetter locking the leads into the encapsulant (not shown, but see theencapsulant 510, FIG. 5) to prevent the leads from dislodging from thesemiconductor package (not shown, but see the semiconductor package 500,FIG. 5).

Referring now to FIG. 5, therein is shown a cross-sectional view of asemiconductor package 500 that has been properly formed and fabricatedusing the leadframe 100 (FIG. 1). The thickness of the leadframe 100 inthis and subsequent FIGs. is exaggerated for clarity of illustration inorder to assist in understanding the invention.

During fabrication of the semiconductor package 500, a semiconductordevice 502 has been suitably secured onto the die attach paddle 106, forexample by means of an epoxy adhesive 504. Lead wires 506 and 508 werethen connected between the semiconductor device 502 and the inner leads102 and the outer leads 104, respectively. The leadframe 100 and thesemiconductor device 502 were then encapsulated in an encapsulant 510,such as a conventional semiconductor package molding compound. The outerportions of the leadframe 100 were then removed, for example by cuttingor sawing, as is known in the art, to form the final, completedsemiconductor package 500.

Often, the exposed die attach paddle 106 of the semiconductor package500 is soldered to a printed circuit board (not shown). This allows thedie attach paddle 106 to provide greater heat dissipation from thesemiconductor device 502 by conducting heat directly to the printedcircuit board. This configuration is also often used to provide groundconnections from the semiconductor package 500 to the printed circuitboard.

The semiconductor package 500, incorporating the leadframe 100, is adual-row leadless package, such as a QFN package. The package is “dualrow” because there is a set of the inner leads 102 arranged in acontinuous ring or inner row around the die attach paddle 106, and theseare surrounded by a corresponding outer row of the outer leads 104. Withthis configuration of inner and outer row leads (which may be arrangedin staggered or in-line configurations), a higher number ofinputs/outputs (“I/Os”) can be provided, in a given semiconductorpackage size, than can be achieved with a single row arranged around theouter periphery of the package.

The semiconductor package 500 has been correctly fabricated so that theouter leads 104, the inner leads 102, and the die attach paddle 106, areall fully exposed, co-planar, and accessible at the bottom exteriorsurface 512 of the semiconductor package 500. In previous prior artdevices, this state of proper exposure has been difficult to achieve,particularly with respect to the inner leads 102. However, propermanufacture is facilitated and assured in the present invention by theencapsulant guides 112 of the inner leads 102.

Referring now to FIG. 6, therein is shown a fragmentary cross-sectionalview 600 of a semiconductor package in an intermediate stage of themolding process. The leadframe 100 with the semiconductor device 502secured thereon is retained within an upper mold member 602 and a lowermold member 604. The encapsulant 510 flows in the direction of an arrow606 through the mold cavity 608 within the upper mold member 602 and thelower mold member 604. During the intermediate fabrication stage shownin FIG. 6, the encapsulant 510 has almost reached the face of theencapsulant guide 112 on the inner lead 102.

It has been discovered, as taught herein, that undesirable displacementof the leadframe leads during the molding process can be prevented. Thisis especially advantageous with the inner leads 102, which are morevulnerable, and is accomplished, in one embodiment, by uniquely formingthe encapsulant guides 112 on the lead tips 108. In particular, thefaces of the encapsulant guides 112 are angled or beveled on the innerleads 102 to present an inwardly (upwardly as shown in the drawingFIGs.) facing slope relative to the direction of flow (the arrow 606) ofthe encapsulant 510 as it flows through the mold cavity 608. (The terms“inwardly” and “outwardly” are with reference to the interior of asemiconductor package, such as the semiconductor package 500 (FIG. 5).The term “outwardly”, when describing such a lead that is adjacent asurface of such a package, means in a direction generally perpendicularto that surface as well as away from the interior of the package.) Thiscauses the encapsulant 510 to engage and push the inner leads 102outwardly toward the exterior of the semiconductor package that is beingformed (see the semiconductor package 802 (FIG. 9)) rather than inwardlytoward the interior of the semiconductor package.

It has thus been discovered that the shape of the encapsulant guides 112on the inner leads 102 can alleviate the problem of displacement (e.g.,lifting) of the inner leads 102 during molding of the encapsulant 510 asit flows therepast. The encapsulant guides 112, as described, present aface that is suitably angled relative to the direction of the flow (thearrow 606) of the encapsulant 510 during the molding process. Theencapsulant guides 112 thereby prevent the lead tips 108 of the innerleads 102 from being lifted or displaced inwardly by the encapsulant 510during the molding process. Rather, as the encapsulant 510 is drivenonto and past the encapsulant guides 112, the reaction force of theencapsulant 510 thereon causes the inner leads 102 to be presseddownwardly and outwardly away from the interior of the semiconductorpackage that is being formed and in the direction of the bottom exteriorsurface thereof (e.g., the bottom exterior surface 912 shown in FIG. 9).

Referring now to FIG. 7, therein is shown a view 700 of the structure ofFIG. 6 at a slightly later stage in the fabrication of the semiconductorpackage 802 (FIGS. 8 and 9). The encapsulant 510 has progressed furtherinto the mold cavity 608 in the direction of the arrow 606, and hasengaged the encapsulant guide 112 on the inner lead 102. The pressure ofthe encapsulant 510 as it flows against the encapsulant guide 112 hasprovided a downward or outward reaction force that has kept the innerlead 102 in position against the lower mold member 604, preventing theencapsulant 510 from flowing thereunder and covering part or all of thebottom of the inner lead 102 in the vicinity of the lead tip 108thereof.

Referring now to FIG. 8, therein is shown a view 800 similar to that ofFIGS. 6 and 7, after completion of the molding process by completion ofthe injection of the encapsulant 510 into the mold cavity 608. Asemiconductor package 802 has been formed in which the lead tips 108 ofthe inner leads 102 have not been lifted, and consequently have not beencovered on the bottom surfaces thereof with the encapsulant 510. Theresult is that the lead tips 108 of the inner leads 102 are fullyexposed on the bottom exterior surface 912 (see FIG. 9) of thesemiconductor package 802, that is, on the outer or exterior surface ofthe encapsulant 510.

Referring now to FIG. 9, therein is shown the semiconductor package 802resulting from the molding process shown in FIGS. 6-8. By virtue of theencapsulant guides 112, the inner leads 102 have been protected fromundesired movement during the molding of the semiconductor package 802.The inner leads 102 have remained in their proper positions, exposed onthe bottom exterior surface 912 of the semiconductor package 802. Thesemiconductor package 802 is therefore properly formed.

Referring now to FIG. 10, therein is shown a flow chart of a method 1000for fabricating a leadframe with encapsulant guide in accordance with anembodiment of the present invention. The method 1000 includes forming adie attach paddle in a block 1002; forming leads around at leastportions of the die attach paddle in a block 1004; and formingencapsulant guides angled on a plurality of the leads to push the leadsoutwardly when an encapsulant flows therepast, in a block 1006.

It has been discovered that the present invention thus has numerousadvantages.

An important advantage of the present invention is that it overcomes thetendency of prior art designs to cause the encapsulant to lift thefingers up or inwardly into the package, causing mold flashtherebeneath.

A major advantage is that the present invention directly and effectivelydeters and virtually eliminates bending and tilting of leadframe leadsduring encapsulant transfer.

Another advantage of the present invention is that the pressure of theencapsulant flow during the molding process of the semiconductorpackage, rather than disturbing the leads, actually powers the leads inthe desired direction toward the exterior surface of the package body.

Accordingly, a major advantage of the present invention is that theleads are properly positioned and exposed on the finished semiconductorpackage.

Yet another advantage of the present invention is that the encapsulantguides can be used on the outer leads as well as the inner leads,particularly as dimensions continue to diminish and the need developsfor assisting the outer leads as well.

Accordingly, it is a significant advantage of the present invention thatthe encapsulant guides can in fact be used on any desired leadconfigurations and arrangements according to the needs and preferencesat hand.

Another advantage of the present invention is that the encapsulantguides can be located wherever appropriate on the leads, not necessarilyjust at the lead tips.

Still another advantage of the present invention is that more than oneencapsulant guide can be provided on each lead as may be needed ordesired.

Another significant advantage of the present invention is that it thusenables and supports continuing reductions in lead and leadframedimensions, along with continuing increases in lead counts, whileconcurrently improving production yields and manufacturing efficiencies.

Yet another important advantage of the present invention is that itvaluably supports and services the historical trend of reducing costs,simplifying systems, and increasing performance.

These and other valuable aspects of the present invention consequentlyfurther the state of the technology to at least the next level.

Thus, it has been discovered that the leadframe with encapsulant guidemethod and apparatus of the present invention furnish important andheretofore unknown and unavailable solutions, capabilities, andfunctional advantages for fabricating encapsulant tolerant andencapsulant distortion-resistant leadframes, and for fabricatingleadless semiconductor packages therefrom. The resulting processes andconfigurations are straightforward, economical, uncomplicated, highlyversatile and effective, can be implemented by adapting knowntechnologies, and are thus fully compatible with conventionalmanufacturing processes and technologies.

While the invention has been described in conjunction with a specificbest mode, it is to be understood that many alternatives, modifications,and variations will be apparent to those skilled in the art in light ofthe aforegoing description. Accordingly, it is intended to embrace allsuch alternatives, modifications, and variations which fall within thescope of the included claims. All matters hithertofore set forth hereinor shown in the accompanying drawings are to be interpreted in anillustrative and non-limiting sense.

1. A method for fabricating a leadframe with encapsulant guide,comprising: forming a die attach paddle; forming leads around at leastportions of the die attach paddle; and forming encapsulant guides angledon a plurality of the leads to push the leads outwardly when anencapsulant flows therepast.
 2. The method of claim 1 wherein formingleads further comprises forming inner and outer leads around the dieattach paddle.
 3. The method of claim 1 wherein forming encapsulantguides further comprises etching the leads.
 4. The method of claim 1further comprising encapsulating the leadframe with at least portions ofthe tips of the leads exposed on at least one exterior surface of theencapsulant.
 5. The method of claim 1 wherein forming the leads furthercomprises forming at least some of the leads along at least a portionthereof to be broader on the top than on the bottom thereof.
 6. A methodfor fabricating a leadframe with encapsulant guide, comprising: forminga die attach paddle; forming leads around the periphery of the dieattach paddle; forming encapsulant guides integral with and angled onthe tips of a plurality of the leads to push the leads outwardly when anencapsulant flows therepast; attaching a semiconductor device to the dieattach paddle; connecting lead wires between the semiconductor deviceand at least some of the leads; and encapsulating at least portions ofthe die attach paddle, semiconductor device, lead wires, and leads. 7.The method of claim 6 wherein forming leads further comprises forminginner and outer leads around the periphery of the die attach paddle. 8.The method of claim 6 wherein forming encapsulant guides furthercomprises etching the tips of the leads.
 9. The method of claim 6further comprising encapsulating the leadframe with at least portions ofthe tips of the leads exposed on at least one exterior surface of theencapsulant.
 10. The method of claim 6 wherein forming the leads furthercomprises forming at least some of the leads along at least a portionthereof to be broader on the top than on the bottom thereof.
 11. Aleadframe with encapsulant guide, comprising: a die attach paddle; leadsaround at least portions of the die attach paddle; and encapsulantguides angled on a plurality of the leads for pushing the leadsoutwardly when an encapsulant flows therepast.
 12. The leadframe ofclaim 11 wherein the leads around the die attach paddle further compriseinner and outer leads around the die attach paddle.
 13. The leadframe ofclaim 11 wherein the encapsulant guides further comprise etched leads.14. The leadframe of claim 11 further comprising an encapsulantencapsulating the leadframe with at least portions of the tips of theleads exposed on at least one exterior surface of the encapsulant. 15.The leadframe of claim 11 wherein at least some of the leads along atleast a portion thereof are broader on the top than on the bottomthereof.
 16. A leadframe with encapsulant guide, comprising: a dieattach paddle; leads around the periphery of the die attach paddle;encapsulant guides integral with and angled on the tips of a pluralityof the leads for pushing the leads outwardly when an encapsulant flowstherepast; a semiconductor device attached to the die attach paddle;lead wires connected between the semiconductor device and at least someof the leads; and an encapsulant encapsulating at least portions of thedie attach paddle, semiconductor device, lead wires, and leads.
 17. Theleadframe of claim 16 wherein the leads around the periphery of the dieattach paddle further comprise inner and outer leads around theperiphery of the die attach paddle.
 18. The leadframe of claim 16wherein the encapsulant guides further comprise etched tips on theleads.
 19. The leadframe of claim 16 further comprising an encapsulantencapsulating the leadframe with at least portions of the tips of theleads exposed on at least one exterior surface of the encapsulant. 20.The leadframe of claim 16 wherein at least some of the leads along atleast a portion thereof are broader on the top than on the bottomthereof.